| Summary: | ti.catalog.c6000.OMAP4430 .cpuCore is too vague ("OMAP4430") | ||
|---|---|---|---|
| Product: | [Technology] RTSC | Reporter: | Chris Ring <cring> |
| Component: | Platforms | Assignee: | Sasha Slijepcevic <sascha> |
| Status: | CLOSED FIXED | QA Contact: | |
| Severity: | major | ||
| Priority: | P3 | CC: | amitm, d-russo |
| Version: | unspecified | ||
| Target Milestone: | --- | ||
| Hardware: | All | ||
| OS: | All | ||
| Whiteboard: | target:3.20.01 | ||
There's a similar issue with the ti.catalog.c6000.TMS320DM8168 platform's .cpuCore. It's set to 'TMS320DM8168', but should probably be something like 'C674'. - fixed in platform-l16 For OMAP4430, cpuCore is set to "64T". For DM730, DM740 and DM8168, cpuCore is set to "674". Confirmed by inspection in xdcprod-m51 Shipped in XDCtools 3.20.01 |
ti.catalog.c6000.OMAP4430's .cpuCore is set to "OMAP4430". The documentation states that this field "uniquely identifies the instruction set that the CPU can decode and execute." As an example, a common .cpuCore is "64x+". I'd suggest changing this to "64T". Config scripts that set memory types based on this .cpuCore are strange: if (platform.match(/sdp4430/)) { if (Program.cpu.attrs.cpuCore == "OMAP4430") { /* strangely(!), C64T */ internalHeapName = "L2SRAM"; } else if (Program.cpu.attrs.cpuCore == "CM3") { /* M3 */ internalHeapName = "L2_RAM"; } } I've set this to major only b/c it would be good to fix this sooner than later so we have less of a migration issue. Chris