Bugzilla – Full Text Bug Listing
| Summary: | Disassembly truncates 64bit instruction addresses | ||||||
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| Product: | [Tools] CDT | Reporter: | James Sullins <jcsullins> | ||||
| Component: | cdt-debug-dsf | Assignee: | Anton Leherbauer <aleherb+eclipse> | ||||
| Status: | RESOLVED FIXED | QA Contact: | Pawel Piech <pawel.1.piech> | ||||
| Severity: | major | ||||||
| Priority: | P3 | CC: | aleherb+eclipse, jcsullins, pawel.1.piech | ||||
| Version: | 7.0 | ||||||
| Target Milestone: | 7.0 | ||||||
| Hardware: | PC | ||||||
| OS: | Linux | ||||||
| Whiteboard: | |||||||
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Created attachment 169627 [details]
proposed patch as described in bug submission
Thanks for the patch. Committed to HEAD. *** cdt cvs genie on behalf of aleherbau *** Bug 314056 - Disassembly truncates 64bit instruction addresses [*] DisassemblyBackendDsf.java 1.8 http://dev.eclipse.org/viewcvs/index.cgi/org.eclipse.cdt/dsf/org.eclipse.cdt.dsf.ui/src/org/eclipse/cdt/dsf/debug/internal/ui/disassembly/DisassemblyBackendDsf.java?root=Tools_Project&r1=1.7&r2=1.8 |
Build Identifier: I20100520-1744 Using Eclipse version 3.6.0 build-id I20100520-1744 and CDT Version 7.0.0 (nightly build) build-id I201005221229 on a 64-bit (x86_64) Intel Linux platform. Disassembly View does not handle 64-bit instruction addresses correctly; instruction addresses that won't fit in 32-bits get truncated. My quick fix... Seems that the problem is in the DisassemblyBackendDsf class in the org.eclipse.cdt.dsf.debug.internal.ui.disassembly package in the org.eclipse.cdt.dsf.ui plugin. Inside the retrieveFrameAddressInSessionThread method, the lines (276-277): if (address.getSize() * 4 > fCallback.getAddressSize()) { fCallback.addressSizeChanged(address.getSize() * 4); should be changed to: if (address.getSize() * 8 > fCallback.getAddressSize()) { fCallback.addressSizeChanged(address.getSize() * 8); since, if I understand the code correctly, there are 8 bits in a byte, not 4. - James Reproducible: Always Steps to Reproduce: 1. Open Disassembly view on 64-bit platform 2. Disassemble instructions with addresses that won't fit in 32-bits 3.